Digital-to-Time Converters (DTC) apply a phase shift/time delay on the edges of an incoming clock signal. DTCs are, e.g., used in modern highly efficient all digital polar transmitter architectures, or in clocking systems. In digital polar transmitter architectures, DTCs enable inter alia very wideband modulation compared to two point modulation architectures. In clocking systems, DTCs enable clock frequency transitions within a single clock cycle, which provide further power consumption optimization for processing units.
Two important indicators for DTC performance are the resolution of the delay shift, which is determined by the number of digital control bits, and the phase noise added to the generated output signal (e.g. including thermal noise and jitter). Depending on the application, it may be desired to achieve low phase noise while providing high resolution. This may result in higher power consumption. In some applications, high delay resolution may be required not all the time and, e.g., depend on the system's operating conditions. In such systems, using a full performance DTC may be a show stopper for using the technology since it may result in a non-competitive power consumption in some of the system scenarios.
Hence, there may be a desire for an improved phase interpolation concept.